Antoine FLOC'H
[contact]    [publications]    [research]   [softwares]  [CV]  

I'm currently working on my Ph.D thesis in the CAIRN group, with my advisers Christophe Wolinski and Francois Charot. I'm funded by an INRIA grant under the Nano2012 project in partnership with ST Microelectronics.

Since January 2010 I'm involved in the LRS joint team between the CAIRN (University of Rennes1) and MELANGE (Colorado State University) groups.

Contact

IRISA, Office D068
Campus de Beaulieu
35042 Rennes CEDEX, France
Mail : antoine.floch@irisa.fr
Phone : +33 2 99 84 75 48

Research

My Phd. thesis is about ASIP processor instruction set extension. I'm mostly interested by following topics:

  • Graph theory algorithms such as pattern generation and graph covering. In my work, covering is expressed as a Constraint Programming problem that models both selection and scheduling under architectural constraints into a single optimization space.

  • Automatic Parallelization. I work on the extraction of custom instructions that can be parallelized at a loop level. I'm using the powerful polyhedral abstraction to find a good and legal transformation of the iteration domain.

  • Parallel Architectures.The target of our ASIP flow is a processor coupled to an extension. It provides a level of potential parallelism between the core/extension but also in the extension itself that can contains multiple parallel datapaths.

  • Constraint Programming (CP).The CP solvers offers a high level of expressivity and an effective and customizable solution space exploration through advanced filtering techniques (called consistency) adapted to each global constraints.

  • Model Driven Engineering (MDE). Most of my developed softwares are based on Model Driven Engineering (specifically EMF). It provides access to all facilities offered by EMF (such as Model to Model transformations, Model To Text and Text to Model) that are especially useful in the context of a fast optimization compiler design used to validate experimental approaches of an ASIP flow.

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    Softwares

    I'm the main contributor of these softwares:

  • ARCAdE : Aspect Oriented Constraint Programming Environnement (http://arcade.gforge.inria.fr)
  • TOM mapping: EMF Metamodel Mapping DSL for TOM tree rewriting rules engine (http://cairn.gforge.inria.fr)
  • Gaya: Graph library and editors. Advanced algorithm such as pattern generation and graph covering (not available now)

    • I'm also involved in:

  • GeCoS : Generic Compiler Suite (http://gecos.gforge.inria.fr)
  • Polymodel : Polyhedral Metamodel and tools (http://gecos.gforge.inria.fr)
  • Graph Mapper: Graph library adapter generator for any EMF graph Metamodel through a mapping DSL (http://cairn.gforge.inria.fr)
  • JNIMap: Generation of JNI bindings to map a C library to Java through a simple DSL description. (http://cairn.gforge.inria.fr)

    • Publications

    International conferences

  • Model-Driven Engineering and Optimizing Compilers: A bridge too far ? Antoine Floch, Tomofumi Yuki, Clement Guy, Steven Derrien, Benoit Combemale, Sanjay Rajopadhye, and Robert B. France , MODELS 2011,16-21 October, Wellington, New Zealand

  • Combined Scheduling and Instruction Selection for Processors with Reconfigurable Cell Fabric Antoine Floch, Christophe Wolinski, Krzysztof Kuchcinski , ASAP 2010, Rennes, France

  • Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system Kevin Martin, Christophe Wolinski,  Krzysztof Kuchcinski, Antoine Floch and François Charot , ASAP 2009, Boston, Massachussets, USA

  • Constraint-Driven Identification of Application Specific Instructions in the DURASE system Kevin Martin, Christophe Wolinski,  Krzysztof Kuchcinski, Antoine Floch and François Charot , SAMOS 2009,Samos, Greece

    • Workshops and tutorials

  • Graph Constraints in Embedded System Design Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Antoine Floch,  Erwan Raffin, François Charot, COESD 2010, Bologna, Italy

  • Design of Accelerators with Constraints Christophe Wolinski,  Krzysztof Kuchcinski, Kevin Martin, Antoine Floch and François Charot, , SweConsNet Workshop, 2009, Linköping, Sweden

  • S2S4HLS and LoMiTa flows in GeCoS Antoine Morvan, Ludovic L'Hours, Antoine Floch, Kevin Martin, M. Adeel Pasha, Amit Kumar, Maxime Naullet, Steven Derrien , University Booth at DATE, 2011, Grenoble, France

  • GeCoS : a source to source optimizing compiler for the automatic synthesis of parallel hardware accelerators Antoine Morvan, Amit Kumar, Antoine Floch, Steven Derrien , Designing for Embedded Parallel Computing Platforms at DATE, 2011, Grenoble, France

    • National conferences

  • Sélection d’instructions et ordonnancement parallèle simultanés pour la conception de processeurs spécialisés Antoine Floch, François Charot, Steven Derrien, Kevin Martin, Antoine Morvan, Christophe Wolinski, , SympA 2011, Saint-Malo, France

  • Sélection automatique d’instructions et ordonnancement d’applications basés sur la programmation par contraintes Kevin Martin, Christophe Wolinski,  Krzysztof Kuchcinski, Antoine Floch and François Charot, , SympA 2009, Toulouse, France

    Misc

  • Compilation pour architectures reconfigurables à grain épais , Antoine Floch , Master thesis, 2007, University of Rennes 1, France